Member of the Cadence North America Software Program

Back to Computer Engineering

This page is only for information related to the use of Cadence software at Jackson State University. Cadence software is used in the Department of Computer Engineering for research projects and in the following courses:

CPE 430 (3) Digital VLSI Design. Prerequisites: EN 212 and CPE 330. This course introduces principles of the design and layout of Very Large Scale Integrated (VLSI) circuits with concentrations on the Complementary Metal-Oxide-Semiconductor (CMOS) technology. Topics include MOS transistor theory and CMOS technology, characterization and performance estimation of CMOS gates. Course projects involve layout designs and simulations using computer-aided design tools.

CPE 492 (1 to 4) Special Studies in Computer Engineering. Pre-requisites: Senior/junior standing in computer engineering and consent of Chair. This course is based on individual projects and problems selected by instructors and individual students. It is open to seniors/juniors in computer engineering only. No more than four credit hours of CPE 492 can be applied towards the degree.

CPE 493 (1 to 4) Special Topics in Computer Engineering. Pre-requisite: Senior/junior standing in computer engineering and consent of Chair. This course includes lectures on recent topics of special interests to students in various areas of computer engineering. It is designed to test new and experimental courses in computer engineering. No more than four credit hours of CPE 493 can be applied towards the degree.

CPE 515 Advanced Logic Design. (3 Hours) Advanced concepts in Boolean algebra; use of hardware description languages as a practical means to implement hybrid sequential and combinational designs; digital logic simulation; rapid prototyping techniques; design for stability concepts; focuses upon the actual design and implementation of sizeable digital design problems using a representative set of Computer Aided Design (CAD) tools.

CPE 530 VLSI Design. (3 Hours) Theory of MOS transistors: fabrication, layout, characterization; CMOS circuit and logic design; circuit and logic simulation, fully complementary CMOS logic, pseudo-NMOS logic, dynamic CMOS logic, pass-transistor logic, clocking strategies; sub system design; ALUs, multipliers, memories, PLAs; architecture design: data path, floor planning, iterative cellular arrays, systolic arrays; VLSI algorithms; chip design and test; full custom design of chips, possible chip fabrication by MOSIS and subsequent chip testing.

CPE 532 Digital Integrated Circuit Design. (3 Hours) Design methodologies for digital systems using a modern hardware description language; algorithmic, architectural and implementation aspects of arithmetic processing elements; design of Complex Instruction Set (CISC), Reduced Instruction Set (RISC), and floating point processors; synthesis, simulation and testing of processors with computer-aided design tools.

CPE 630 Design Automation of VLSI Systems. (3 Hours) Theory and algorithms for design automation, design automation tools in VLSI systems, Advanced VSLI design principles, Verilog and VHDL hardware description languages; timing-driven physical design and synthesis, circuit simulation and validation, formal verification, design for reuse and System on Chip (SOC) design methodology.

CPE 693 Advanced Topics in Engineering. (Variable 1 to 4 Hours) Pre-requisites: Graduate standing in engineering. Lectures on advanced topics of special interest to students in various areas of computer engineering are introduced. This course number is used to offer and test new courses.

CPE 698 Independent Study. (Variable 1-4 Hours) Intensive study of a special engineering project including research and literature review selected in accordance with the student’s interests and arranged in consultations with the advisor. Topics will vary. Student will make periodic reports as well as a paper at the end of the semester. Prerequisite: permission of Department.

CPE 699 Thesis Research. (Variable 1-6 hrs) Master’s thesis representing independent and original research. Prerequisite: permission of advisor.

Contact Information:
Khalid H. Abed, Ph.D.
Department of Computer Engineering
Jackson State University (JSU)
1400 J. R. Lynch St., (JSU Box 17098)
Jackson, MS. 39217
Office: 601.979.3920
Fax: 601.979.6988

This page last updated: July 5, 2007.

Cadence is a registered trademark of Cadence Design Systems, Inc.,

2655 Seely Avenue, San Jose, CA 95134.